Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDL

Abstract

This paper reports on the challenges encountered, and the solutions adopted in the hardware and software co-verification of a wafer-scale integrated (WSI) system. The WaferBoardtrade is designed for rapid prototyping of complex digital systems. This advanced technology embeds a smart active substrate that can be configured through a set of JTAG ports to interconnect digital integrated chips placed on its surface. The software that generates JTAG bit streams and the related hardware infrastructure embedded in the WaferBoardtrade must be validated early and efficiently in the design process to improve productivity. The system co-verification methodology presented in this paper relies on a unified SystemC-VHDL environment making the design and verification tasks more effective. Results demonstrate that the simulation time complexity grows quadratically with the circuit size in number of gates if one JTAG port is used.