High Speed Average Power CMOS Current Comparator

V. Thrivikramaru, R. K. Baghel
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引用次数: 3

Abstract

This work proposes the new CMOS Current Comparator circuit suitable for High Speed and Marginal Power applications. Proposed circuit had been simulated in a proprietary 180 nm CMOS process, using Cadence Spectre Simulator and UMC models. Current comparator circuit had impressed with current pulses ranging from Milli-Amperes to Nano-Amperes and its Speed and Power consumption had been simulated and measured. When made a comparison with the earlier reported circuits, our circuit achieves Very High Speed of operation and acceptable power consumption. For Micron range input currents the power consumption of the newly proposed current comparator is very much lower than the other earlier proposed circuits.
高速平均功率CMOS电流比较器
本文提出了一种适用于高速和边际功率应用的新型CMOS电流比较器电路。利用Cadence Spectre模拟器和UMC模型,在专有的180 nm CMOS工艺中对所提出的电路进行了仿真。对电流比较器电路进行了从毫安到纳米安培的电流脉冲模拟,并对其速度和功耗进行了模拟和测量。当与先前报道的电路进行比较时,我们的电路实现了非常高的运行速度和可接受的功耗。对于微米范围的输入电流,新提出的电流比较器的功耗比其他先前提出的电路低得多。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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