Novel single p+poly-Si/Hf/SiON gate stack technology on silicon-on-thin-buried-oxide (SOTB) for ultra-low leakage applications

Y. Yamamoto, H. Makiyama, T. Yamashita, H. Oda, S. Kamohara, N. Sugii, Y. Yamaguchi, T. Mizutani, M. Kobayashi, T. Hiramoto
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引用次数: 7

Abstract

We demonstrate a cost effective 65-nm SOTB CMOS technology for ultra-low leakage applications. Novel single p+poly-Si/Hf/SiON gate stack of mid-gap work function and precise GIDL control achieved ultra-low leakage of 0.2 pA/μm, which corresponds to approx. 100nA/chip (100k gate logic). Now the SOTB technology can provide three options from ultra-low voltage to ultra-low leakage that covers a wide variety of applications in the Internet of Things (IoT) era.
基于薄埋氧化硅(SOTB)的新型单p+多晶硅/Hf/SiON栅极堆叠技术,用于超低泄漏应用
我们展示了一种具有成本效益的65纳米SOTB CMOS技术,用于超低漏损应用。新颖的单p+多晶硅/Hf/SiON栅极叠层具有中隙工作功能和精确的GIDL控制,实现了0.2 pA/μm的超低漏损。100nA/片(100k门逻辑)。现在,SOTB技术可以提供从超低电压到超低漏损的三种选择,涵盖了物联网(IoT)时代的各种应用。
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