A VLSI convolutional neural network architecture for vanishing point computation

Abstract

This paper presents a VLSI Convolutional Neural Network with special features to implement the Vanishing Point algorithm. The architecture is based on a multi-scale array, with one column processor that implements a neural network with local connectivity, a row processor of SIMD elements that can implement generic convolution and a voting mechanism, which is used by the Vanishing Point algorithm. In addition, a 32-bit 7 pipeline-stage has been designed to sequence all the operations. Simulations of the architecture described in a Hardware description language are shown.