{"title":"RF LDMOS Transistor Plastic Immunity Enhancement in Power Amplifier Module for 5G Applications","authors":"Vikas S. Shilimkar, Kevin Kim","doi":"10.1109/BCICTS50416.2021.9682465","DOIUrl":null,"url":null,"abstract":"Plastic encapsulation is one of the most common processes in packaging of RF products. It is critical to understand and mitigate the impact of plastic on circuit performance. In this paper, we show that plastic encapsulation increases an LDMOS transistor gate, drain, and gate-drain capacitances by about 3%, 15%, and 45%, respectively. This translates to degradation of power gain, and shifts and rotations in load-pull contours. In addition, losses in the plastic material cause the transistor efficiency to degrade as well. We show two techniques to address the challenges caused by plastic encapsulation. First, an additional die coat is proposed. Second, a novel extended shield between gate and drain metallization is demonstrated. The additional die coat results in improved performance, which is achieved with negligible change to the load-pull contour despite the plastic encapsulation. The extended shield mitigates the increase in gate, drain, and gate-drain capacitances that otherwise result from plastic encapsulation. This is reflected in the large-signal performance, with gain improved by 1.6 dB and efficiency enhanced by almost 2 % points.","PeriodicalId":284660,"journal":{"name":"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS50416.2021.9682465","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Plastic encapsulation is one of the most common processes in packaging of RF products. It is critical to understand and mitigate the impact of plastic on circuit performance. In this paper, we show that plastic encapsulation increases an LDMOS transistor gate, drain, and gate-drain capacitances by about 3%, 15%, and 45%, respectively. This translates to degradation of power gain, and shifts and rotations in load-pull contours. In addition, losses in the plastic material cause the transistor efficiency to degrade as well. We show two techniques to address the challenges caused by plastic encapsulation. First, an additional die coat is proposed. Second, a novel extended shield between gate and drain metallization is demonstrated. The additional die coat results in improved performance, which is achieved with negligible change to the load-pull contour despite the plastic encapsulation. The extended shield mitigates the increase in gate, drain, and gate-drain capacitances that otherwise result from plastic encapsulation. This is reflected in the large-signal performance, with gain improved by 1.6 dB and efficiency enhanced by almost 2 % points.