{"title":"A comparison of redundant CORDIC rotation engines","authors":"J. Harding, T. Lang, Jeong-A Lee","doi":"10.1109/ICCD.1991.139972","DOIUrl":null,"url":null,"abstract":"The CMOS implementation of two high performance rotation processors using redundant CORDIC are reviewed and compared. One of the designs uses a variable scaling factor while the other is with constant scaling. The latter also incorporates some radix-4 CORDIC stages. Characteristics for 1.2 mu m CMOS implementations are given.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139972","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
The CMOS implementation of two high performance rotation processors using redundant CORDIC are reviewed and compared. One of the designs uses a variable scaling factor while the other is with constant scaling. The latter also incorporates some radix-4 CORDIC stages. Characteristics for 1.2 mu m CMOS implementations are given.<>