A 2.25-mW/Gb/s 80-Gb/s-PAM4 linear driver with a single supply using stacked current-mode architecture in 65-nm CMOS

S. Nakano, M. Nagatani, M. Nogawa, Y. Kawamura, K. Kikuchi, K. Tsuzuki, H. Nosaka
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引用次数: 11

Abstract

This paper presents a low-power linear driver for a coherent optical transmitter. We propose a driver using stacked current-mode architecture to achieve low-power consumption with a single supply. The driver can drive from 25 to 50 Ω impedances with almost the same output waveforms by using a variable equalizer and adjusting the current of the post-amplifier. The proposed driver was fabricated in 65-nm CMOS technology and achieved the power efficiency of 3.6 mW/Gb/s with a differential output swing of 2.9 Vpp for a 50-Gb/s NRZ signal and 2.25 mW/Gb/s with a differential output swing of 2.0 Vpp for an 80-Gb/s PAM4 signal.
2.25 mw /Gb/s 80 Gb/s- pam4单电源线性驱动器,采用65纳米CMOS堆叠电流模式架构
介绍了一种用于相干光发射机的低功率线性驱动器。我们提出了一种采用堆叠电流模式架构的驱动器,以实现单电源的低功耗。通过使用可变均衡器和调整后置放大器的电流,驱动器可以驱动25到50个Ω阻抗,输出波形几乎相同。该驱动器采用65纳米CMOS技术制造,在50gb /s NRZ信号和80gb /s PAM4信号下,功率效率分别为3.6 mW/Gb/s和2.25 mW/Gb/s,差分输出摆幅分别为2.9 Vpp和2.0 Vpp。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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