Reduction of test power and data volume in BIST scheme based on scan slice overlapping

Abstract

In order to further reduce test data storage and test power of deterministic BIST based on LFSR reseeding and scan slice overlapping scheme, two optimization algorithms are proposed. One algorithm is to reorder scan cell by random exchanging two scan cells considering layout constraint in every loop. If both the number of specified bits and the number of overlapping blocks after exchanging operation are decreased, the exchanging operation is kept, otherwise the exchanging operation is ignored. The other algorithm is to partition test patterns by selecting the scan slice with most specified bits as the first scan slice of the current overlapping block. In this way, the partition which can lead to the minimal number of overlapping blocks and the minimal number of specified bits can be always achieved. Combining the proposed algorithms, test power and even test data storage can be significantly reduced. Experimental results indicate that the proposed method significantly reduces the switching activity and test data storage by 72%–92% and 54%–91%, respectively.