On-chip logic minimization

Roman L. Lysecky, F. Vahid
{"title":"On-chip logic minimization","authors":"Roman L. Lysecky, F. Vahid","doi":"10.1145/775832.775918","DOIUrl":null,"url":null,"abstract":"While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such as Internet Protocol routing table and network access control list reduction, require logic minimization during the application's runtime, and hence could benefit from minimization executing on-chip alongside the application. On-chip minimization can even enable dynamic hardware/software partitioning. We discuss requirements of on-chip logic minimization, and present our new on-chip logic minimization tool, ROCM. We compare with the well-known Espresso logic minimizer and show that ROCM is 10 times smaller, executes 10-20 times faster, and uses 3 times less data memory, with a mere 2% quality penalty, for the routing table and access control list applications. We show that ROCM solves real-sized problems on an ARM7 embedded processor in just seconds.","PeriodicalId":167477,"journal":{"name":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","volume":"192 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"41","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/775832.775918","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 41

Abstract

While Boolean logic minimization is typically used in logic synthesis, logic minimization can be useful in numerous other applications. However, many of those applications, such as Internet Protocol routing table and network access control list reduction, require logic minimization during the application's runtime, and hence could benefit from minimization executing on-chip alongside the application. On-chip minimization can even enable dynamic hardware/software partitioning. We discuss requirements of on-chip logic minimization, and present our new on-chip logic minimization tool, ROCM. We compare with the well-known Espresso logic minimizer and show that ROCM is 10 times smaller, executes 10-20 times faster, and uses 3 times less data memory, with a mere 2% quality penalty, for the routing table and access control list applications. We show that ROCM solves real-sized problems on an ARM7 embedded processor in just seconds.
片上逻辑最小化
虽然布尔逻辑最小化通常用于逻辑合成,但逻辑最小化在许多其他应用程序中也很有用。然而,许多这样的应用程序(例如Internet Protocol路由表和网络访问控制列表缩减)需要在应用程序运行时将逻辑最小化,因此可以从最小化与应用程序一起在芯片上执行中获益。片上最小化甚至可以实现动态硬件/软件分区。我们讨论了片上逻辑最小化的要求,并提出了我们新的片上逻辑最小化工具ROCM。我们将其与著名的Espresso逻辑最小化器进行了比较,结果表明,对于路由表和访问控制列表应用程序,ROCM比前者小10倍,执行速度快10-20倍,使用的数据内存少3倍,质量损失仅为2%。我们展示了ROCM可以在几秒钟内解决ARM7嵌入式处理器上的实际问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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