Impact of reducing RTA temperature on sub-10nm ultra-thin body SOI

Jong-Heon Yang, Jihun Oh, W. Cho, C. Ahn, K. Im, I. Baek, J. Park, Seongjae Lee
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引用次数: 0

Abstract

In this work, we fabricated sub-10 nm UTB SOI and investigated its properties by using plasma doping (PLAD) and rapid thermal annealing (RTA). It is shown, for the first time, that electrical properties and device scalability of the sub-10 nm thin body were improved with reduced RTA temperature. In scaling down, SOI thickness decreases, but also RTA temperature scaling should be considered. RTA temperature is directly connected to the suppression of the short-channel effect and also it gives more chance for device scalability, especially for sub-20 nm SOI devices.
降低RTA温度对亚10nm超薄机身SOI的影响
本文采用等离子体掺杂(PLAD)和快速热退火(RTA)技术制备了亚10nm UTB SOI,并对其性能进行了研究。研究首次表明,随着RTA温度的降低,亚10nm薄体的电学性能和器件可扩展性得到改善。当缩尺减小时,SOI厚度减小,但也要考虑RTA温度的缩尺。RTA温度直接关系到短通道效应的抑制,也为器件的可扩展性提供了更多的机会,特别是对于sub- 20nm的SOI器件。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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