A Wide Locking-Range, Low Phase-Noise and High Output Power D-Band SiGe PLL

Abstract

A fully integrated, wide locking-range fundamental frequency SiGe phase-locked-loop (PLL) at D-band is proposed which utilizes coupled voltage-controlled-oscillators (VCOs) to generate and distribute balanced RF signals in a symmetric and compact form factor. The proposed technique facilitates the balanced LO distribution, increases the output power, improves the phase noise, and increases the locking range of frequency dividers at the same time, all at the cost of increased DC power consumption. The designed VCO achieves better than 10% DC-to-RF conversion efficiency across the entire tuning-range and provides output power of better than +8 dBm. The VCO achieves a FoMt of more than 194, which, to the best of our knowledge is the highest FoMt among the reported D-band VCOs. The PLL was fully integrated in a 130 nm SiGe BiCMOS technology. This PLL locks at 105–117 GHz. It achieves a phase noise of better than −100 dBc/ Hz and −121 dBc/ Hz at 1 MHz and 10 MHz offset from a 116 GHz carrier, respectively. The measured average output power is better than +8 dBm across the entire locking-range.