{"title":"A mixed-signal calibration technology for the pipeline A/D converter","authors":"Shangquan Liang, Yongsheng Yin, Honghui Deng, Xiao-lei Wang, Minglun Gao","doi":"10.1109/ASICON.2009.5351477","DOIUrl":null,"url":null,"abstract":"A mixed-signal calibration architecture and algorithm based upon 14bits 1.5b/s pipeline A/D converter is proposed1. The mixed-signal calibration algorithm consists of analog domain calibration and digital domain calibration. The analog-domain calibration algorithm adopts the level shifting technology to shift the input signal to lower voltage range. The digital output is reconstructed in the digital-domain after analog-to-digital conversion. The digital-domain calibration algorithm adopts code-by-code compensation technique and constructs a linear equation by the method of awaiting determined coefficients. An error calibration look-up table is acquired through the digital-domain calibration. A behavioral-level model of 14bits 1.5b/s pipeline ADC with mixed-signal calibration algorithm is established. The results show that the proposed calibration architecture and algorithm can effectively calibrate errors. The INL and DNL are reduced within ±0.5LSB. The SNDR is improved from 30.8dB to 84.5dB, and the ENOB is arrived to 13.74bits.","PeriodicalId":446584,"journal":{"name":"2009 IEEE 8th International Conference on ASIC","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE 8th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON.2009.5351477","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A mixed-signal calibration architecture and algorithm based upon 14bits 1.5b/s pipeline A/D converter is proposed1. The mixed-signal calibration algorithm consists of analog domain calibration and digital domain calibration. The analog-domain calibration algorithm adopts the level shifting technology to shift the input signal to lower voltage range. The digital output is reconstructed in the digital-domain after analog-to-digital conversion. The digital-domain calibration algorithm adopts code-by-code compensation technique and constructs a linear equation by the method of awaiting determined coefficients. An error calibration look-up table is acquired through the digital-domain calibration. A behavioral-level model of 14bits 1.5b/s pipeline ADC with mixed-signal calibration algorithm is established. The results show that the proposed calibration architecture and algorithm can effectively calibrate errors. The INL and DNL are reduced within ±0.5LSB. The SNDR is improved from 30.8dB to 84.5dB, and the ENOB is arrived to 13.74bits.