An Ultra-Low Power K band Balanced Frequency Doubler with a Novel Current-reused Structure

Abstract

An ultra-low power truly balanced frequency doubler has been demonstrated in a 110 nm CMOS technology, operating from 22 to 25 GHz with high fundamental rejection. The current-reused structure is leveraged to save power consumption, improve its fundamental rejection and symmetry of the differential outputs. The measured saturated power is 0 dBm, and the best fundamental rejection is 44 dB. The frequency doubler operates under a 1.2 V supply voltage and achieves -4.2 dB conversion gain with 6 mW power consumption.