A Novel System-Level Power Integrity Transient Analysis Methodology using Simplified CPM Model, Physics-based Equivalent Circuit PDN Model and Small Signal VRM Model
Jun Xu, S. Bai, Biyao Zhao, Kartheek Nalla, Mike Sapozhnikov, J. Drewniak, C. Hwang, J. Fan
{"title":"A Novel System-Level Power Integrity Transient Analysis Methodology using Simplified CPM Model, Physics-based Equivalent Circuit PDN Model and Small Signal VRM Model","authors":"Jun Xu, S. Bai, Biyao Zhao, Kartheek Nalla, Mike Sapozhnikov, J. Drewniak, C. Hwang, J. Fan","doi":"10.1109/ISEMC.2019.8825256","DOIUrl":null,"url":null,"abstract":"The goal of a well-designed power delivery network (PDN) is to deliver desired voltage level from the source to destination, in other words, to minimize voltage noise and errors delivered to chip. This paper provides power integrity engineers a guideline to model PDN agilely in a simplified method and choose specific voltage regulator module model under specific circumstances. These comparisons and studies present the advantage of this novel methodology using equivalent circuit model for system level power integrity transient analysis.","PeriodicalId":137753,"journal":{"name":"2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISEMC.2019.8825256","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
The goal of a well-designed power delivery network (PDN) is to deliver desired voltage level from the source to destination, in other words, to minimize voltage noise and errors delivered to chip. This paper provides power integrity engineers a guideline to model PDN agilely in a simplified method and choose specific voltage regulator module model under specific circumstances. These comparisons and studies present the advantage of this novel methodology using equivalent circuit model for system level power integrity transient analysis.