A Configurable Enhanced T/sup 2/RAM Macro for System-Level Power Management Unified Memory

K. Arimoto, F. Morishita, I. Hayashi, I. Gyohten, H. Noda, T. Ipposhi, K. Dosaka
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引用次数: 2

Abstract

TTRAM can provide high speed, low power and high density with CMOS compatible SOI process. However it is difficult to handle as the unified memory required for advanced SoC because it needs the simple control sensing operation for memory compiler, higher cell efficiency, and lower voltage operation for dynamic frequency and voltage control. The enhanced TTRAM (ET2RAM) can solve these issues and the key technologies provide 0.5V memory operation, compact and higher sensitivity sense amplifier, and programmable multi-bank array
用于系统级电源管理统一存储器的可配置增强T/sup 2/RAM宏
tram可以提供高速度、低功耗和高密度的CMOS兼容SOI工艺。然而,作为高级SoC所需的统一存储器,它很难处理,因为它需要简单的内存编译器控制传感操作,更高的单元效率,以及动态频率和电压控制的低电压操作。增强型tram (ET2RAM)可以解决这些问题,其关键技术提供0.5V存储操作、紧凑和高灵敏度的感测放大器和可编程多组阵列
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