ML-assisted IC Test Binning with Real-Time Prediction at the Edge

Abstract

IC Test is a critical part of semiconductor manufacturing and proper die binning and material disposition has an important impact on the overall yield and on the process monitoring and failure mode diagnostics. Edge analytics are becoming an increasingly important aspect of die disposition. By intercepting parts in real-time at the wafer test step, we can save downstream processing needs. In this paper we show how a machine learning model running on the ACS $\text{Edge}^{\text{TM}}$ infrastructure can provide 20-40x improvement in identification and binning of fail parts compared to conventional statistical screening methods. We also show that by incorporating known cost data, we can automatically guide users to optimally tune the model for maximal failure capture with minimal overkill and realize significant business savings.