All-digital spectrum analyser based on a parallel algorithm

Abstract

The architecture of an all-digital spectrum analyzer is presented. It is based on a maximum entropy algorithm which is characterized by the VLSI features of the parallelism, modularity, and locality. The analyzer consists of five functional blocks: (a) an A/D converter, (b) a correlator, (c) a linear array for computation of the AR filter coefficients, (d) a special-purpose FFT for computing the spectrum from the AR coefficients, and (e) a decibel evaluator. Fully parametric design of all blocks is given, so that the optimal time-hardware trade-off is achieved.<>