High speed performance of 0.35 /spl mu/m CMOS gates fabricated on low dose SIMOX substrates with/without N-well underneath the buried oxide layer

Abstract

High speed performances of CMOS/SIMOX circuits have been demonstrated using the low dose SIMOX substrate in spite of the thin (80nm) buried oxide layer. The following two factors have been pointed out to understand the results: (i) the depletion layer which spreads underneath the buried oxide (BOX) layer, and (ii) the Vth-lowering in the PMOS transistor due to the negative back bias (VGB=-VDD) effect. However, the correlations between the high speed performance and these two factors have not been shown in detail. In this paper, we clarify the nature of the high speed performance of the fully depleted mode ultrathin CMOS/SIMOX gates fabricated on the low dose SIMOX substrate on the basis of our experimental results.