Novel processing approach for sub-micron heterojunction bipolar transistors

Abstract

The fabrication of high reliability, high current gain and low l/f noise heterojunction bipolar transistors (HBTs) has utilized a fully depleted thin AlGaAs layer to eliminate base surface recombination current. Higher frequency and lower power devices require scaling to sub-micron dimensions and control of this passivation ledge is a difficult processing problem that has precluded prior investigation of sub-micron devices. In this study, we report the development of a novel self-alignment approach using e-beam lithography to realize passivation ledges as small as 0.1 ym. This new fabrication approach allows us to experimentally investigate the limits of passivation for HBTs and establish that the minimum ledge to eliminate all recombination is 0.3pm. we have also simulated the performance of these HBTs by both analytical models and a 2Dsimulator, Semi-Cad. Our experimental and theoretical results are in excellent agreement and enable one to optimize high speed or low power structures with smaller ledges where complete passivation is not achieved. The maximum current gain in our fully passivated devices is base transport limited at 900.