An On-chip Path Delay Measurement Sensor for Aging Monitoring

Abstract

With the development of technology, the reliability of integrated circuit (IC) is challenged by multiple aging mechanisms, which would increase the delay of ICs and result in timing violations. Hence, it is necessary to obtain the aging degradation rate of IC by measuring the delay change of the critical path. In this paper, an all-digital on-chip path delay measurement sensor is proposed. By measuring the critical path delay through IC lifetime, the aging degradation rate of IC can be obtained in real time. The proposed sensor has high measurement accuracy, and aging has a limited impact on it. Experiment result shows that the random measurement error is between 1.04ps -1.46ps during 1.5 years aging.