Chairs' welcome message

Abstract

Welcome to the 2009 IEEE International High Level Design Validation and Test Workshop, the 14th in a series of events that explores emerging trends, innovative research and scalable solutions in the areas of validation and test for electronic systems. The two day technical program includes exciting sessions on topics such as design validation approaches at RTL and at system-level, high-level modeling techniques to assist validation, formal verification, and post-silicon validation and debug.