W. Lepkowski, S. Wilk, M. R. Ghajar, B. Bakkaloglu, T. Thornton
{"title":"An integrated MESFET voltage follower LDO for high power and PSR RF and analog applications","authors":"W. Lepkowski, S. Wilk, M. R. Ghajar, B. Bakkaloglu, T. Thornton","doi":"10.1109/CICC.2012.6330634","DOIUrl":null,"url":null,"abstract":"A CMOS low dropout linear regulator (LDO) with a MESFET based follower output stage was designed and fabricated on a commercial 45nm SOI CMOS technology. The proposed LDO demonstrates a dropout voltage of <;170mV at 1A load current while occupying 0.245mm2 of die area. The approach includes a novel depletion mode n-channel MESFET in a low output impedance source follower configuration. This enables the LDO to achieve stable operation under all line and load conditions without the need for generating higher internal voltage rails or external compensation. The compact structure and its inherent stability make it ideal for high powered analog, mixed signal and RF system-on-chip applications that require high PSR under different loading conditions.","PeriodicalId":130434,"journal":{"name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2012.6330634","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
A CMOS low dropout linear regulator (LDO) with a MESFET based follower output stage was designed and fabricated on a commercial 45nm SOI CMOS technology. The proposed LDO demonstrates a dropout voltage of <;170mV at 1A load current while occupying 0.245mm2 of die area. The approach includes a novel depletion mode n-channel MESFET in a low output impedance source follower configuration. This enables the LDO to achieve stable operation under all line and load conditions without the need for generating higher internal voltage rails or external compensation. The compact structure and its inherent stability make it ideal for high powered analog, mixed signal and RF system-on-chip applications that require high PSR under different loading conditions.
采用商用45nm SOI CMOS技术,设计并制作了一种基于MESFET的从动器输出级的CMOS低差线性稳压器(LDO)。所提出的LDO在1A负载电流下的压降电压< 170mV,同时占据0.245mm2的芯片面积。该方法包括一个新颖的耗尽模式n通道MESFET在一个低输出阻抗源从动器配置。这使得LDO能够在所有线路和负载条件下实现稳定运行,而无需产生更高的内部电压轨或外部补偿。紧凑的结构及其固有的稳定性使其非常适合在不同负载条件下需要高PSR的高功率模拟,混合信号和RF片上系统应用。