MOSFET designs and characteristics for high performance logic at micron dimensions

Abstract

Micron dimension n-channel silicon gate MOSFET's optimized for high performance logic applications have been designed and characterized for both room temperature and liquid nitrogen temperature operation. Variation of threshold voltage with channel length and width are given for both enhancement and depletion devices. Layout groundrules for direct electron-beam pattern exposure using 1 µm minimum linewidth have been proved out in the fabrication of exploratory microprocessor circuitry. Tests on typical NOR logic circuits are described, including unloaded ring oscillators with delays down to 240 ps at room temperature and down to 100 ps at liquid nitrogen temperature.