Process integration and optimization of GaAs MESFET and MSM based opto-electronics integrated circuit (OEIC) using statistical experimental design techniques

Abstract

Focuses on developing a manufacturable, robust, ion implanted 0.6 /spl mu/m GaAs metal-semiconductor field-effect transistor (MESFET) and metal-semiconductor-metal (MSM) based optoelectronic integrated circuit process. Our approach is to represent the OEIC process as the integration of key process modules. Each process module has well defined design parameters and statistically significant transfer characteristics. The statistically significant transfer characteristics of each process module were obtained through design of experiment (DOE) and response surface modeling (RSM), through the use of both experimental data and calibrated process simulators. These transfer characteristics are used to determine the process optimum, considering design for manufacturability (DFM). The mapping of random process variations onto device variations, are realized by these transfer characteristics and used for statistical circuit design for manufacturability. Therefore, the process yield can be enhanced at both the circuit design and the process design levels. The process capability (Cp) is assessed by these modules' transfer characteristics, as well; thus manufacturability can be incorporated into the early stage of process development. As a result, high yield OEIC transmitter and receiver chips with data transmission rates above 1 Gbit/sec have been achieved.