C. Drosos, C. Dre, D. Metafas, D. Soudris, S. Blionas
{"title":"The low power baseband processing parts of a novel dual mode DECT/GSM terminal","authors":"C. Drosos, C. Dre, D. Metafas, D. Soudris, S. Blionas","doi":"10.1109/ICECS.2001.957657","DOIUrl":null,"url":null,"abstract":"In order to support a dual mode DECT/GSM terminal architecture, with low power characteristics and integrated support for direct conversion terminal architecture the basic parts of such a terminal were designed and implemented. These parts include a baseband processor and a modem. The baseband processor is designed to support dual mode operation, all baseband processing required and different terminal architectures (heterodyne or direct conversion). The modem features a GMSK/GFSK modulator and a novel, low power detection algorithm that supports direct conversion terminals. The architecture of the direct conversion wireless terminal is presented along with details on the low power characteristics of the processor and the modem. Experimental results from the operation of the terminal are also presented.","PeriodicalId":141392,"journal":{"name":"ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-09-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2001.957657","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In order to support a dual mode DECT/GSM terminal architecture, with low power characteristics and integrated support for direct conversion terminal architecture the basic parts of such a terminal were designed and implemented. These parts include a baseband processor and a modem. The baseband processor is designed to support dual mode operation, all baseband processing required and different terminal architectures (heterodyne or direct conversion). The modem features a GMSK/GFSK modulator and a novel, low power detection algorithm that supports direct conversion terminals. The architecture of the direct conversion wireless terminal is presented along with details on the low power characteristics of the processor and the modem. Experimental results from the operation of the terminal are also presented.