Sensitivity of NRZ and PAM4 signaling schemes to channel insertion loss deviation

Abstract

Paper discusses channel Insertion Loss Deviation (ILD) effects on binary and multi-level signaling in high-speed link design. Overview of ILD phenomenon is given and its sources in a multi-stage transmission line are discussed. Comparison tests are provided for channels with different amount of ILD. The test channels were simulated to mimic backplane channels with daughter cards. In order to cause significant ILD, impedance mismatches and interconnect parasitic effects were introduced into the model. Results are analyzed in terms of eye diagram degradations due to ILD induced ISI noise.