A bandgap circuit operating up to 300/spl deg/C using lateral bipolar transistors in thin-film CMOS-SOI technology

S. Adriaensen, V. Dessard, D. Flandre
{"title":"A bandgap circuit operating up to 300/spl deg/C using lateral bipolar transistors in thin-film CMOS-SOI technology","authors":"S. Adriaensen, V. Dessard, D. Flandre","doi":"10.1109/HITEN.1999.827461","DOIUrl":null,"url":null,"abstract":"A voltage reference circuit with 3V output has been designed and implemented in a SOI (Silicon-On-Insulator) FD (Fully-Depleted) CMOS technology for very wide temperature range applications. The design integrates thin-film lateral bipolar transistors and diffusion resistors. The circuit has been fabricated and tested over the full operating temperature range (25/spl deg/C-300/spl deg/C) and features a temperature coefficient lower than 100 ppm//spl deg/C.","PeriodicalId":297771,"journal":{"name":"HITEN 99. Third European Conference on High Temperature Electronics. (IEEE Cat. No.99EX372)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"HITEN 99. Third European Conference on High Temperature Electronics. (IEEE Cat. No.99EX372)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HITEN.1999.827461","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

A voltage reference circuit with 3V output has been designed and implemented in a SOI (Silicon-On-Insulator) FD (Fully-Depleted) CMOS technology for very wide temperature range applications. The design integrates thin-film lateral bipolar transistors and diffusion resistors. The circuit has been fabricated and tested over the full operating temperature range (25/spl deg/C-300/spl deg/C) and features a temperature coefficient lower than 100 ppm//spl deg/C.
采用薄膜CMOS-SOI技术的横向双极晶体管,工作温度高达300/spl度/C的带隙电路
在SOI(绝缘体上硅)FD(完全耗尽)CMOS技术中设计并实现了具有3V输出的电压参考电路,适用于非常宽的温度范围应用。该设计集成了薄膜横向双极晶体管和扩散电阻。该电路已在整个工作温度范围(25/spl°C-300/spl°C)下制造和测试,其温度系数低于100 ppm//spl°C。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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