Optimization techniques for multiple output function synthesis

Abstract

Design of multiple outputs CMOS combinational gates is considered. Two techniques for the minimization of multiple output functions at the switching level are introduced. These techniques are based on innovative transistor interconnection structures named Delta and Lambda networks. A branch and bound algorithm to be used for complex gate synthesis is presented. Design examples are also provided. It is shown that the two techniques can be combined together, if necessary, to obtain further area reductions.<>