A robust 8F/sup 2/ ferroelectric RAM cell with depletion device (DeFeRAM)

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI:10.1109/VLSIC.1999.797250

G. Braun, H. Hoenigschmid, T. Schlager, W. Weber

引用次数: 1

Abstract

This paper describes an area penalty free, leakage compensated and noise immune 8F/sup 2/ cell design suitable for high density low power FeRAM generations. The array concept features a 1TIC ferroelectric memory cell containing an additional depletion device (DeFeRAM) controlled by the passing word line in a folded bit line architecture. A highly reliable three level word line driver circuit design is discussed.

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带耗尽器件的8F/sup /铁电RAM电池

本文介绍了一种适用于高密度低功耗FeRAM的无面积损失、漏损补偿和抗噪声8F/sup / cell设计。该阵列的特点是一个1TIC铁电存储单元，其中包含一个额外的耗尽器件(DeFeRAM)，该器件由折叠位线架构中的传递字线控制。讨论了一种高可靠性的三电平字行驱动电路设计。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326)

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