DTMOS power switch in 28 nm UTBB FD-SOI technology

J. Le Coz, B. Pelloux-Prayer, B. Giraud, F. Giner, P. Flatresse
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引用次数: 9

Abstract

Ultra-Thin Body and Box (UTBB) Fully Depleted Silicon-On-Insulator (FD-SOI) Technology has become mainstream in the industry with the objective to serve a wide spectrum of mobile multimedia products [1]. Transistors (fig 1) are fabricated in a 7nm thin layer of silicon sitting (Tsi) over a 25nm buried oxide (Tbox). Thanks to its better electrostatic control [2]; UTBB FD-SOI technology brings a significant improvement in terms of performance and power saving, complemented by an excellent responsiveness to power management design techniques for energy efficiency optimization. However, looking for a steady increase in performance for a voltage supply value constantly lowered with the evolution of technologies, BULK or FD-SOI, involves a decrease in the threshold voltage (Vt) and leads to an increase of the stand-by leakage current, requiring the implementation of a leakage current reduction technique.
采用28nm UTBB FD-SOI技术的DTMOS电源开关
超薄机身和机箱(UTBB)完全耗尽绝缘体上硅(FD-SOI)技术已经成为行业的主流,其目标是服务于广泛的移动多媒体产品。晶体管(图1)是在7nm薄层的硅衬底(Tsi)上25nm埋埋氧化物(Tbox)中制造的。由于其更好的静电控制[2];UTBB FD-SOI技术在性能和节能方面带来了显著的改进,并辅以对电源管理设计技术的出色响应,以实现能效优化。然而,随着技术(BULK或FD-SOI)的发展,电压供应值不断降低,寻找稳定的性能增长,涉及阈值电压(Vt)的降低,并导致待机泄漏电流的增加,需要实施泄漏电流减小技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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