BBVC-3D-NoC: An Efficient 3D NoC Architecture Using Bidirectional Bisynchronous Vertical Channels

A. Rahmani, P. Liljeberg, J. Plosila, H. Tenhunen
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引用次数: 14

Abstract

In this paper, a 3D NoC architecture based on Bidirectional Bisynchronous Vertical Channels (BBVC) is proposed as a solution to mitigate area footprints of vertical interconnects. BBVCs, which can be dynamically self-configured to transmit flits in either direction, enable the system to benefit from a high-speed bidirectional channel instead of a pair of unidirectional channels for inter-layer communication. By exploiting the high-speed nature of the vertical links in 3D ICs, this substitution indicates better bandwidth utilization, lower area footprint, and improved routability at each layer. Our results reveal that the proposed architecture helps to achieve up to 47% savings in TSV area footprint at the 65nm technology node.
BBVC-3D-NoC:一种使用双向双同步垂直通道的高效3D NoC架构
本文提出了一种基于双向双同步垂直通道(BBVC)的3D NoC架构,以减少垂直互连的面积占用。bbvc可以动态自配置,在任何一个方向上传输信号,使系统受益于高速双向通道,而不是一对单向通道进行层间通信。通过利用3D ic中垂直链路的高速特性,这种替代表明更好的带宽利用率,更低的面积占用,以及每层的可达性。我们的研究结果表明,所提出的架构有助于在65nm技术节点上节省高达47%的TSV面积。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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