Implementation of multipliers in FPGA structures

Abstract

This paper studies different solutions for carrying out multiplication: a fully functional multiplier denoted as variable coefficient multiplier (VCM), constant coefficient multiplier (KCM) and self-configurable multiplier denoted as dynamic constant coefficient multiplier (DKCM). For FPGAs which can be easily reconfigured the choice between the VCM and KCM cannot be easily defined. Furthermore, the DKCM is an additional, middle-way between the KCM and VCM solution, as it offers shorter reprogramming time but occupies more area in comparison with the KCM. In FPGAs, the choice of the optimum multiplier involves three factors: area, propagation and reconfiguration time, which have been thoroughly studied and respective implementation results given. Furthermore, to speed-up implementation of multipliers a design-automated tool has been developed which generates optimum (for given input parameters), VHDL description of multipliers.