A 90nm Floating Gate "B4-Flash" Memory Technology- Breakthrough of the Gate Length Limitation on NOR Flash Memory

T. Ogura, M. Mihara, Y. Kawajiri, K. Kobayashi, S. Shimizu, S. Shukuri, N. Ajika, M. Nakashima
{"title":"A 90nm Floating Gate \"B4-Flash\" Memory Technology- Breakthrough of the Gate Length Limitation on NOR Flash Memory","authors":"T. Ogura, M. Mihara, Y. Kawajiri, K. Kobayashi, S. Shimizu, S. Shukuri, N. Ajika, M. Nakashima","doi":"10.1109/IMW.2009.5090573","DOIUrl":null,"url":null,"abstract":"A 90 nm floating gate NOR B4-Flash memory with IF (F: minimum feature size) gate length cell has been investigated by using 64 Mbit test chip to evaluate the scalability of B4-Flash memory. 90 nm (=1F) gate length of memory cell is shortest in many NOR flash memories reported previously. Basic program and erase characteristics and robust program disturb immunity of B4-Flash memory utilizing NMOS select transistor in memory cell array have been demonstrated. Furthermore, to simplify the peripheral circuits and reduce a die size, a new charge pump circuit which can generate both positive and negative high voltage at a supply voltage of 1.8 V has been introduced.","PeriodicalId":113507,"journal":{"name":"2009 IEEE International Memory Workshop","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International Memory Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2009.5090573","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

A 90 nm floating gate NOR B4-Flash memory with IF (F: minimum feature size) gate length cell has been investigated by using 64 Mbit test chip to evaluate the scalability of B4-Flash memory. 90 nm (=1F) gate length of memory cell is shortest in many NOR flash memories reported previously. Basic program and erase characteristics and robust program disturb immunity of B4-Flash memory utilizing NMOS select transistor in memory cell array have been demonstrated. Furthermore, to simplify the peripheral circuits and reduce a die size, a new charge pump circuit which can generate both positive and negative high voltage at a supply voltage of 1.8 V has been introduced.
90nm浮栅“B4-Flash”存储技术——突破NOR闪存栅长度限制
采用64 Mbit测试芯片,研究了具有IF (F:最小特征尺寸)栅极长度单元的90 nm浮栅NOR b4闪存,以评估b4闪存的可扩展性。90 nm (=1F)的栅极长度是目前报道的NOR闪存中最短的。研究了基于NMOS选择晶体管存储单元阵列的b4闪存的基本程序和擦除特性及鲁棒程序抗干扰能力。此外,为了简化外围电路和减小芯片尺寸,本文还引入了一种新的电荷泵电路,该电路可以在1.8 V的电源电压下产生正、负高压。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信