{"title":"64-bit hybrid dual-threshold voltage power-aware conditional carry adder design","authors":"Kuo-Hsing Cheng, Shun-Wen Cheng, Chan-Wei Huang","doi":"10.1109/IWSOC.2004.1319851","DOIUrl":null,"url":null,"abstract":"A 64-bit hybrid dual-threshold conditional-carry adder for power-aware applications was presented. Components on critical paths use a low threshold voltage to accelerate the speed of operation. Other components use the normal threshold voltage to save power. This is attractive in implementing power-aware arithmetic systems. The proposed circuit has the lowest power-delay product and energy-delay product. The hybrid circuit represents a fine compromise between power and performance. Its power efficiency is better than that of the single threshold voltage circuit designs.","PeriodicalId":306688,"journal":{"name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2004.1319851","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A 64-bit hybrid dual-threshold conditional-carry adder for power-aware applications was presented. Components on critical paths use a low threshold voltage to accelerate the speed of operation. Other components use the normal threshold voltage to save power. This is attractive in implementing power-aware arithmetic systems. The proposed circuit has the lowest power-delay product and energy-delay product. The hybrid circuit represents a fine compromise between power and performance. Its power efficiency is better than that of the single threshold voltage circuit designs.