{"title":"Recent advances in reduced-order modeling of complex interconnects","authors":"S. Grivet-Talocia, I. Maio, F. Canavero","doi":"10.1109/EPEP.2001.967655","DOIUrl":null,"url":null,"abstract":"This paper addresses some important issues related to reduced-order modeling of complex interconnects. Two different but complementary directions are investigated. On one hand, multiport interconnect structures with possibly complex geometry are analyzed by means of model order reduction from transient scattering responses. On the other hand, some recent advances on stable and robust treatment of transmission lines with arbitrary frequency-dependent parameters are illustrated. Both modeling strategies lead to the automatic generation of a SPICE-ready equivalent circuit for system-level simulation.","PeriodicalId":174339,"journal":{"name":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2001.967655","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper addresses some important issues related to reduced-order modeling of complex interconnects. Two different but complementary directions are investigated. On one hand, multiport interconnect structures with possibly complex geometry are analyzed by means of model order reduction from transient scattering responses. On the other hand, some recent advances on stable and robust treatment of transmission lines with arbitrary frequency-dependent parameters are illustrated. Both modeling strategies lead to the automatic generation of a SPICE-ready equivalent circuit for system-level simulation.