Reducing lead-free soldering failures caused by Printed Circuit Board shrinkage

Abstract

The paper presents a novel approach on an emerging problem in lead-free reflow soldering technology. The trend of miniaturized SMD device application and the increasing component density cause newfound problems during the reflow process. In this work, the issue of Printed Circuit Board (PCB) shrinkage is inspected in the environment of automotive electronics production. The shrinkage effect results in linear offset on the double sided PCB along the (XY) dimensions during stencil printing of the second reflow pass. The observed phenomenon causes tombstone and bridging failures on specific fine-pitch SMD components. To investigate and obtain deeper understanding of the phenomenon, a new method was developed for the measurement of shrinkage. The novel measurement method is evaluated with a less-productive, but more precise measurement device. With the collected data it is possible to approximate the overall shrinkage of the given product. After introducing a compensation step on the stencil design (based on the measurements), it is possible to significantly reduce the quantity of failures caused by the shrinkage.