Seung-Myeong Yu, Yunha Kang, W. Choi, Jongchan An, Junyoung Song
{"title":"A 20Gb/s/pin Single-ended Transmitter with FEXT Compensation Technique","authors":"Seung-Myeong Yu, Yunha Kang, W. Choi, Jongchan An, Junyoung Song","doi":"10.1109/ICEIC51217.2021.9369798","DOIUrl":null,"url":null,"abstract":"A 20 Gb/s/pin single-ended transmitter with far end crosstalk (FEXT) compensation technique is proposed. The capacitive peaking driver (CPD) compensates the FEXT. Using the data before serializer in each transmitter, effect of FEXT is predicted. So, the difference of latency between data for compensation and transmission is eliminated. The delay of data for compensating FEXT adjusted, thereby it is possible to have optimal eye-opening for different flying-times between adjacent channels. The proposed architecture is designed with 65nm CMOS process. The designed transmitter has eye-opening of width with 39.3 ps and height with 43.2 mV at supply voltage of 1-V.","PeriodicalId":170294,"journal":{"name":"2021 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Electronics, Information, and Communication (ICEIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEIC51217.2021.9369798","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A 20 Gb/s/pin single-ended transmitter with far end crosstalk (FEXT) compensation technique is proposed. The capacitive peaking driver (CPD) compensates the FEXT. Using the data before serializer in each transmitter, effect of FEXT is predicted. So, the difference of latency between data for compensation and transmission is eliminated. The delay of data for compensating FEXT adjusted, thereby it is possible to have optimal eye-opening for different flying-times between adjacent channels. The proposed architecture is designed with 65nm CMOS process. The designed transmitter has eye-opening of width with 39.3 ps and height with 43.2 mV at supply voltage of 1-V.