{"title":"PYRAMID-a hierarchical waveform relaxation-based circuit simulation program","authors":"P. Saviz, O. Wing","doi":"10.1109/ICCAD.1988.122545","DOIUrl":null,"url":null,"abstract":"A hierarchical waveform-relaxation-based method for analysis of bipolar, MOS, and GaAs FET circuits is presented. By analyzing the circuit in a hierarchical manner, a faster solution has been obtained for circuits exhibiting strong bidirectionality and feedback than has previously been possible. The technique has been applied to a wide variety of digital and mixed analog/digital circuits, and circuits containing over 18000 transistors have been analyzed. Results obtained for a variety of circuits show up to two orders of magnitude improvement in computation time compared to conventional circuit simulation techniques and up to one order of magnitude improvement compared to the standard waveform-relaxation technique.<<ETX>>","PeriodicalId":285078,"journal":{"name":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCAD.1988.122545","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
A hierarchical waveform-relaxation-based method for analysis of bipolar, MOS, and GaAs FET circuits is presented. By analyzing the circuit in a hierarchical manner, a faster solution has been obtained for circuits exhibiting strong bidirectionality and feedback than has previously been possible. The technique has been applied to a wide variety of digital and mixed analog/digital circuits, and circuits containing over 18000 transistors have been analyzed. Results obtained for a variety of circuits show up to two orders of magnitude improvement in computation time compared to conventional circuit simulation techniques and up to one order of magnitude improvement compared to the standard waveform-relaxation technique.<>