An efficient verification and test scheme for media broadcasting demodulator

Abstract

For the complex development process of media broadcasting demodulator chip, it is proposed that a low cost, high reliability verification and test scheme at system level in this paper. This scheme emphasizes the collaboration of algorithm simulation, RTL description, FPGA verification, ASIC realization and any other stages of chip development. All these stages constitute an organic, closely interconnected whole. And for the particularity of communication chip, this scheme can solve function verification and performance test, ensure the accuracy, completeness and reliability of the test and verification. Then both the development time and the cost of the product are significantly reduced. This verification and test scheme has been applied to the demodulation chip of the receiver of Chinese broadcasting standard DTMB system.