{"title":"A Bi-Directional Electronically Tunable CMOS Phase Shifter Using the High-Pass Topology","authors":"M. Abdalla, K. Phang, G. Eleftheriades","doi":"10.1109/MWSYM.2007.380356","DOIUrl":null,"url":null,"abstract":"This paper presents an integrated phase shifter based on the high-pass L-C topology. The circuit utilizes both varactors and active inductors to extend the tuning range and achieve a low return loss. The high-pass topology results in a compact IC implementation, and allows phase compensation in series-fed antenna arrays utilizing this phase shifter. Furthermore, this approach allows integrating multiple stages on the same IC, without a significant size increase. A negative resistance is generated by the active inductor circuit, and is used to partially compensate the varactor losses. A test chip is fabricated in a standard 0.13 mum CMOS process, and a phase tuning range of 96deg is achieved at 4 GHz, with a return loss better than -18 dB across the entire tuning range. The phase shifter achieves a -2.2 dBm input compression point and a 7.4 dBm IIP3 while operating from a 1.5 V supply.","PeriodicalId":213749,"journal":{"name":"2007 IEEE/MTT-S International Microwave Symposium","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE/MTT-S International Microwave Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2007.380356","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents an integrated phase shifter based on the high-pass L-C topology. The circuit utilizes both varactors and active inductors to extend the tuning range and achieve a low return loss. The high-pass topology results in a compact IC implementation, and allows phase compensation in series-fed antenna arrays utilizing this phase shifter. Furthermore, this approach allows integrating multiple stages on the same IC, without a significant size increase. A negative resistance is generated by the active inductor circuit, and is used to partially compensate the varactor losses. A test chip is fabricated in a standard 0.13 mum CMOS process, and a phase tuning range of 96deg is achieved at 4 GHz, with a return loss better than -18 dB across the entire tuning range. The phase shifter achieves a -2.2 dBm input compression point and a 7.4 dBm IIP3 while operating from a 1.5 V supply.