Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure

D. Suzuki, T. Hanyu
{"title":"Design of an MTJ-based nonvolatile lookup table circuit using an energy-efficient single-ended logic-in-memory structure","authors":"D. Suzuki, T. Hanyu","doi":"10.1109/MWSCAS.2015.7282195","DOIUrl":null,"url":null,"abstract":"A 6-input nonvolatile lookup table (LUT) circuit is proposed using an energy-efficient single-ended logic-in-memory (LIM) structure in conjunction with a magnetic tunnel junction (MTJ) device. While the use of a conventional single-ended LIM structure makes the multi-input LUT circuit compact, a long delay due to the small difference in the MTJ resistance and a large amount of dynamic power consumption due to a DC current path are unavoidable. To overcome the problem, a PMOS feedback transistor which makes it possible to accelerate the logic operation is utilized in the proposed LUT circuit. The use of the PMOS feedback transistor also makes it possible to reduce dynamic power consumption by automatically cutting off the DC current just after logic value `0' is read. In fact, the power-delay product of the proposed 6-input LUT circuit is reduced by 66% in comparison with that of the conventional single-ended one under a 90-nm CMOS technology.","PeriodicalId":216613,"journal":{"name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2015.7282195","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

A 6-input nonvolatile lookup table (LUT) circuit is proposed using an energy-efficient single-ended logic-in-memory (LIM) structure in conjunction with a magnetic tunnel junction (MTJ) device. While the use of a conventional single-ended LIM structure makes the multi-input LUT circuit compact, a long delay due to the small difference in the MTJ resistance and a large amount of dynamic power consumption due to a DC current path are unavoidable. To overcome the problem, a PMOS feedback transistor which makes it possible to accelerate the logic operation is utilized in the proposed LUT circuit. The use of the PMOS feedback transistor also makes it possible to reduce dynamic power consumption by automatically cutting off the DC current just after logic value `0' is read. In fact, the power-delay product of the proposed 6-input LUT circuit is reduced by 66% in comparison with that of the conventional single-ended one under a 90-nm CMOS technology.
基于mtj的非易失性查找表电路设计,采用高能效的单端内存逻辑结构
提出了一种6输入非易失性查找表(LUT)电路,该电路采用节能的单端内存逻辑(LIM)结构与磁隧道结(MTJ)器件相结合。虽然使用传统的单端LIM结构使多输入LUT电路紧凑,但由于MTJ电阻差异小而导致的长延迟和由于直流电流路径导致的大量动态功耗是不可避免的。为了克服这个问题,在LUT电路中使用了PMOS反馈晶体管,可以加速逻辑运算。PMOS反馈晶体管的使用还可以通过在读取逻辑值“0”后自动切断直流电流来降低动态功耗。事实上,在90纳米CMOS技术下,与传统单端电路相比,所提出的6输入LUT电路的功率延迟积降低了66%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信