A 0.5 V 900 MHz CMOS Receiver Front End

Abstract

A 900 MHz RF receiver front end including an LNA, downconversion mixer and associated LO buffers is presented. All circuits operate from a 0.5 V supply without any internal voltage boosting. The circuit is designed in 0.18 mum standard CMOS. It achieves a conversion gain of 12 dB, an IIP3 of -14 dBm and a noise figure of 9 dB. The circuit, including the LO buffers, dissipates 7.4 mW and occupies an active area of 0.43 mm2