MOSFET implant failure analysis using plane-view scanning capacitance microscopy coupled with nano-probing and TCAD modeling

Abstract

This paper presents MOSFET implant failure analysis using plane view scanning capacitance microscopy (PVSCM) at silicon substrate level. Failing transistors are characterized by nano-probing (NP) at contact level. The cause of failure was deduced from the combination of PVSCM, IV characteristics from NP measurement, and TEM cross-section analysis. Technology computer aided design (TCAD) simulation was implemented for failure modeling and SCM data verification. Failure analysis case studies of samples manufactured by 65 nm and 45 nm process are presented.