A Novel Multi-level CMOS Switching Mode Amplifier for Mobile Communication Signals

Abstract

This paper presents simulation results of a CMOS switching mode power amplifier (SA) in a 65nm technology with adjustable output voltage swing. The output stage is built in a stacked design to prevent dielectric breakdown of the transistors. Inverters at the top and bottom of the stack provide the supply voltage for the stack. The configuration offers a variable output voltage swing between one, two or three times the nominal transistor supply voltage. This paper demonstrates the advantages over a power amplifier with fixed output levels for signals with high peak to average output power ratio (PAPR).