Using voltage and temperature adders to account for variations in operating conditions during digital timing simulation

Abstract

Rather than applying the historical approach of using voltage and temperature multipliers to scale timing performance in digital simulators, adders are used to model the change in performance due to variations in operating conditions (voltage and temperature). The adders are treated as functions of input transition rate (Tx) and output load capacitance (Cload) and greatly improve the absolute accuracy of the timing simulator as compared to using multipliers. A methodology for predicting the sensitivity of timing performance to variations in voltage and temperature is presented.