A 64GHz 6.5 dB NF 15.5 dB gain LNA in 90nm CMOS

S. Pellerano, Y. Palaskas, K. Soumyanath
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引用次数: 21

Abstract

This paper presents an integrated LNA for mm-wave applications implemented in 90 nm CMOS technology. Modeling methodology based solely on electromagnetic simulations, RC parasitic extraction and device measurements up to 20 GHz allows for "correct-by-construction" design at mm-wave frequency and first-pass silicon success. The dual-stage cascode LNA has a peak gain of 15.5 dB at 64 GHz with an NF of 6.5 dB, while drawing 26 mA per stage from 1.65 V. Output P1dB is 3.8 dBm. At VDD = 1.26 V, each stage draws 19 mA, with a peak gain and a NF of 13.5 dB and 6.7 dB respectively. To the authors' knowledge, this is the lowest measured NF at mm-wave frequencies reported so far in CMOS. Measured results are in excellent agreement with simulations. A custom set-up for mm- wave NF measurement is also extensively described in the paper.
90nm CMOS 64GHz 6.5 dB NF 15.5 dB增益LNA
本文提出了一种基于90nm CMOS技术的毫米波集成LNA。建模方法完全基于电磁模拟,RC寄生提取和高达20 GHz的设备测量,允许在毫米波频率和首次通过硅成功的情况下进行“结构正确”设计。双级级级码LNA在64 GHz时的峰值增益为15.5 dB, NF为6.5 dB,在1.65 V时每级吸收26 mA。输出P1dB为3.8 dBm。在VDD = 1.26 V时,每级吸收19 mA,峰值增益和NF分别为13.5 dB和6.7 dB。据作者所知,这是迄今为止在CMOS中报道的毫米波频率下测量到的最低NF。测量结果与模拟结果非常吻合。本文还详细介绍了一种用于毫米波NF测量的自定义装置。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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