Research and design of level converter circuit for I/O ports

Yi-zhong Yang, Guang-jun Xie, Xuan Zhao
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引用次数: 0

Abstract

A level converter circuit for I/O ports from 3.3V LVTTL logic to 1.8V CMOS logic with TSMC 0.18um CMOS process has been designed. Level converter circuit has been integrated in an Integrated Circuit, which use single supply voltage. A positive feedback circuit similar to the Schmitt Flip-Flop is adopted to realize the level conversion, which also acts as both a buffer and a waveform shaping role. ESD protection circuit is implemented by the diode and resistor circuit structure traditionally. Signal acquisition circuit use a D flip-flop consisted of the structure of CMOS transmission gate. A number of suitable buffers are used to link up them. The circuit has been used in an IC, which works on 250MHz. The result shows that design satisfies design requirement exactly.
I/O口电平转换电路的研究与设计
采用台积电0.18um CMOS工艺设计了3.3V LVTTL逻辑到1.8V CMOS逻辑的I/O端口电平转换电路。将电平转换电路集成到集成电路中,采用单电源电压。采用类似施密特触发器的正反馈电路实现电平转换,同时起到缓冲和波形整形的作用。传统的ESD保护电路是由二极管和电阻电路结构实现的。信号采集电路采用D触发器组成的CMOS传输门结构。一些合适的缓冲区被用来连接它们。该电路已应用于工作频率为250MHz的集成电路中。结果表明,设计完全满足设计要求。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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