Simulation and Experimentation of 57-Level Inverter

Abstract

In this paper, a 57-level asymmetric multilevel inverter is proposed with less number of devices and sources. Working process of symmetric and asymmetric structures are studied and tested using MATLAB. Proposed asymmetric structure is compared and analyzed against other multilevel inverter topologies. Resistive load and reactive load is considered for symmetric and asymmetric inverter simulation. Further, symmetric and asymmetric configurations are compared in terms of harmonic content. Proto-type development is carried out for the fifty-seven-level asymmetric inverter and the test results are presented. From the results, it is concluded that both symmetric and asymmetric structure yield low harmonic output waveforms.