A design of power management for passive UHF RFID tag in 90nm CMOS process

Abstract

The design of the power management proposed is one of the key elements in a passive UHF RFID tag, including these diverse operations as a matching network for maximum power delivery, NMOS rectifier, voltage regulation. The proposed power management which gives 16.5% of the power conversion efficiency and a 26m of read range is obtained under conditions of 920Mhz, -22 dBm input power and 1M DC output load. The equations for predicting the performance of the power management are provided and verified by both simulation results in 90 nm CMOS process.