Non-linear coupling voltage of split-gate flash memory cells with additional top coupling gate

S. Saha
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引用次数: 10

Abstract

The study presents the dependence of floating gate (FG) coupling potential, V FG on the source line (SL) programming voltage, V SL of the split-gate flash memory cells with an additional top coupling gate above FG, called the `SG-TCG` cells. The mathematical analysis shows non-linear V FG against V SL behaviour of SG-TCG cells depending on the operation region of FG-MOSFETs. It is found that as the value of V SL increases, the value of V FG initially increases steeply, then gradually and finally, linearly with a lower slope. This anomalous V FG against V SL behaviour is because of the potential drop in the bulk of FG-MOSFETs by the applied V SL . The mathematical analysis, also, shows SL coupling factor (κ SL ) roll-off because of the increase in the FG-MOSFETs body potential with the increase in V SL . In addition, κ SL is shown to approach a constant value in the saturation region of FG-MOSFETs where V FG is less susceptible to supply voltage fluctuation. The mathematical analysis agrees very well with the numerical device simulation. The study, clearly, shows that in order to achieve higher shift in programme cell threshold voltage and reduce performance variability owing to supply voltage fluctuation, the target programming bias V SL of nanoscale SG-TCG cells must be higher than the saturation voltage of FG-MOSFETs.
附加顶部耦合栅极的分栅闪存单元非线性耦合电压
研究了浮栅(FG)耦合电位的依赖性,V FG对源线(SL)编程电压的依赖性,在浮栅(FG)上附加顶部耦合门的分栅闪存单元(称为“SG-TCG”单元)的V SL。数学分析表明,随着FG- mosfet工作区域的变化,SG-TCG单元的V - FG和V - SL行为呈非线性变化。发现随着V SL值的增大,V FG值先急剧增大,然后逐渐增大,最后以较低的斜率线性增大。这种异常的V FG对V SL的行为是由于施加的V SL使FG- mosfet的体积电位下降。数学分析还表明,随着V - SL的增加,fg - mosfet体电位的增加导致了SL耦合因子(κ SL)滚降。此外,κ SL在FG- mosfet的饱和区域接近恒定值,其中V FG对电源电压波动的影响较小。数学分析与数值模拟结果吻合较好。研究清楚地表明,为了实现更高的程序单元阈值电压偏移,并减少由于电源电压波动而导致的性能变化,纳米级SG-TCG单元的目标编程偏置V SL必须高于fg - mosfet的饱和电压。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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